Förderer: EU FP7-ICT-2007-1
Runtime: 36 months
Project Start: 1.2.2008
Project Partners: 11 universities, research institutes and companies from the fields of nanoelectronics from 5 partner countries
For future developments of wireless communication systems, new Electronic Design Automation (EDA) tools are indispensable. These tools are needed to develop nanoscale designs of unprecedented complexity and performance and, in addition, enable the achievement of single-pass design success to avoid costly re-spins and the loss of market opportunities.
Currently it is impossible to provide accurate simulations of such a wireless system, or even a smaller section of it encompassing just the RF front-end. The advent of multi-standard and Software Defined Radios (SDRs) requires moreover a new generation of transceiver architectures and corresponding CAD tools, dealing with centre frequencies in the GHz range. Many transceivers have to work in a mobile environment. Therefore low power consumption is mandatory which must be traded off with the circuit’s linearity and gain.
The key for enabling the realization of single-chip integration of high-GHz wireless modules is resolving the shortcomings of available design flows. According to the 2006 Sematech roadmap this step in technology requires novel CAD tools and mathematical methods to deal with analogue/digital mixed signal simulation, with challenges in system design and methodologies, parasitic extraction, device and EM simulation, model extraction and optimization tools. The ICESTARS project will deliver the methodologies and prototype tools to make this possible, by combining the research results of several domains to achieve a clear view on the dependencies between different parts of the complete RF design.
Link to Project Main Page: https://cordis.europa.eu/project/rcn/85568_de.html
On-Chip-Inductor 